|
The
8052 microcontroller is the 8051's "big brother." It is a slightly
more powerful microcontroller, sporting a number of additional
features which the developer may make use of:
-
256
bytes of Internal RAM (compared to 128 in the standard 8051).
-
A
third 16-bit timer, capable of a number of new operation modes and
16-bit reloads.
-
Additional SFRs to support the functionality offered by the third
timer.
That's
really about all there is to the difference between the 8051 and
8052. The remainder of this tutorial will explain these additional
features offered by the 8052, and how they are used within user
programs. Throughout this tutorial, it is assumed that you already
have read the 8051 Tutorial and have a thorough understanding of it.
The
standard 8051 microcontroller contains 128 bytes of Internal RAM
that are available to the developer as working memory for variables
and/or for the operating stack. Instructions that refer to addresses
in the range of 00h through 7Fh refer to the 8051's Internal RAM,
while addresses in the range of 80h through FFh refer to Special
Function Registers (SFRs).
Although the 8052 has 256 bytes of Internal RAM, the above method of
referrencing them remains true. Any address between 00h and 7Fh
refers to Internal RAM whereas address in the range of 80h through
FFh refer to SFRs.
The
8052's additional Internal RAM may only be referred by Indirect
Addressing. Indirect addressing always refers to Internal RAM, never
to an SFR.
Thus,
to read the value contained in Internal RAM address 90h, the
developer would need to code something along the lines of the
following:
MOV
R0,#90h ;Set the indirect address to 90h
MOV
A,@R0 ;Read the contents of Internal RAM pointed to by R0
The
above code first assigns the value 90h to the register R0. It
subsequently reads, indirectly, the contents of the address
contained in R0 (90h). Thus, after these two instructions have
executed, the Accumulator will contain the value of Internal RAM
address 90h.
It is
very important to understand that the above code is not the same as
the following:
MOV
A,90h ;Reads the contents of SFR 90h (P1)
This
instruction uses direct addressing; recall that direct addressing
reads Internal RAM when the address is in the range of 00h through
7Fh, and reads an SFR when the address is in the range of 80h
through FFh. Thus in the case of this second example, the move
instruction reads the value of SFR 90h-which happens to be P1 (I/O
Port 1).
In
addition to the 8051's standard 21 SFRs, the 8052 adds an additional
5 SFRs related to the 8052's third timer. All of the original 8051
SFRs function exactly as they do in the 8051-the 8052 simply adds
new SFRs, it doesn't change the definition of the standard SFRs.
The
five new SFRs are in the range of C8h to CDh (SFR C9h is not
defined).
The operation of Timer 2 (T2) is controlled almost
entirely by the T2CON SFR, at address C8h. Note that since this SFR
is evenly divisible by 8 that it is bit-addressable.
| BIT |
NAME |
BIT ADDRESS |
DESCRIPTION |
| 7 |
TF2 |
CFh |
Timer 2 Overflow. This bit is set when
T2 overflows. When T2 interrupt is enabled, this bit will
cause the interrupt to be triggered. This bit will not be set
if either TCLK or RCLK bits are set. |
| 6 |
EXF2 |
CEh |
Timer 2 External Flag. Set by a reload
or capture caused by a 1-0 transition on T2EX (P1.1), but only
when EXEN2 is set. When T2 interrupt is enabled, this bit will
cause the interrupt to be triggered. |
| 5 |
RCLK |
CDh |
Timer 2 Receive Clock. When this bit
is set, Timer 2 will be used to determine the serial port
receive baud rate. When clear, Timer 1 will be
used. |
| 4 |
TCLK |
CCh |
Timer 2 Receive Clock. When this bit
is set, Timer 2 will be used to determine the serial port
transmit baud rate. When clear, Timer 1 will be
used. |
| 3 |
EXEN2 |
CBh |
Timer 2 External Enable. When set, a
1-0 transition on T2EX (P1.1) will cause a capture or reload
to occur. |
| 2 |
TR2 |
CAh |
Timer 2 Run. When set, timer 2 will be
turned on. Otherwise, it is turned off. |
| 1 |
C/T2 |
C9h |
Timer 2 Counter/Interval Timer. If
clear, Timer 2 is an interval counter. If set, Timer 2 is
incremented by 1-0 transition on T2 (P1.0). |
| 0 |
CP/RL2 |
C8h |
Timer 2 Capture/Reload. If clear, auto
reload occurs on timer 2 overflow, or T2EX 1-0 transition if
EXEN2 is set. If set, a capture will occur on a 1-0 transition
of T2EX if EXEN2 is set. |
Timer 2 may be used
as a baud rate generator. This is accomplished by setting either
RCLK (T2CON.5) or TCLK (T2CON.4).
With the standard
8051, Timer 1 is the only timer which may be used to determine the
baud rate of the serial port. Additionally, the receive and transmit
baud rate must be the same.
With the 8052,
however, the user may configure the serial port to receive at one
baud rate and transmit with another. For example, if RCLK is set and
TCLK is cleared, serial data will be received at the baud rate
determined by Timer 2 whereas the baud rate of transmitted data will
be determined by Timer 1.
Determining the
auto-reload values for a specific baud rate is discussed in Serial
Port Operation; the only difference is that in the case of Timer 2,
the auto-reload value is placed in RCAP2H and RCAP2L, and the value
is a 16-bit value rather than an 8-bit value.
NOTE: When Timer 2 is
used as a baud rate generator (either TCLK or RCLK are set), the
Timer 2 Overflow Flag (TF2) will not be set.
The first mode in
which Timer 2 may be used is Auto-Reload. The auto-reload mode
functions just like Timer 0 and Timer 1 in auto-reload mode, except
that the Timer 2 auto-relaod mode performs a full 16-bit reload
(recall that Timer 0 and Timer 1 only have 8-bit reload values).
When a reload occurs, the value of TH2 will be reloaded with the
value contained in RCAP2H and the value of TL2 will be reloaded with
the value contained in RCAP2L.
To operate Timer 2 in
auto-reload mode, the CP/RL2 bit (T2CON.0) must be clear. In this
mode, Timer 2 (TH2/TL2) will be reloaded with the reload value
(RCAP2H/RCAP2L) whenever Timer 2 overflows; that is to say, whenever
Timer 2 overflows from FFFFh back to 0000h. An overflow of Timer 2
will cause the TF2 bit to be set, which will cause an interrupt to
be triggered, if Timer 2 interrupt is enabled. Note that TF2 will
not be set on an overflow condition if either RCLK or TCLK (T2CON.5
or T2CON.4) are set.
Additionally, by also
setting EXEN2 (T2CON.3), a reload will also occur whenever a 1-0
transition is detected on T2EX (P1.1). A reload which occurs as a
result of such a transition will cause the EXF2 (T2CON.6) flag to be
set, triggering a Timer 2 interrupt if said interrupt has been
enabled.
A new mode specific
to Timer 2 is called "Capture Mode." As the name implies, this mode
captures the value of Timer 2 (TH2 and TL2) into the capture SFRs
(RCAP2H and RCAP2L). To put Timer 2 in capture mode, CP/RL2
(T2CON.0) must be set, as must be EXEN2 (T2CON.3).
When configured as
mentioned above, a capture will occur whenever a 1-0 transition is
detected on T2EX (P1.1). At the moment the transition is detected,
the current values of TH2 and TL2 will be copied into RCAP2H and
RCAP2L, respectively. At the same time, the EXF2 (T2CON.6) bit will
be set, which will trigger an interrupt if Timer 2 interrupt is
enabled.
NOTE 1: Note that
even in capture mode, an overflow of Timer 2 will result in TF2
being set and an interrupt being triggered.
NOTE 2: Capture mode
is an efficient way to measure the time between events. At the
moment that an event occurs, the current value of Timer 2 will be
copied into RCAP2H/L. However, Timer 2 will not stop and an
interrupt will be triggered. Thus your interrupt routine may copy
the value of RCAP2H/L to a temporary holding variable without having
to stop Timer 2. When another capture occurs, your interrupt can
take the difference of the two values to determine the time
transpired. Again, the main advantage is that you don't have to stop
timer 2 to read its value, as is the case with timer 0 and timer 1.
As is the case with
the other two timers, timer 2 can be configured to trigger and
interrupt. In fact, the text above indicates a number of situations
that can trigger a timer 2 interrupt.
To enable Timer 2
interrupt, set ET2 (IE.5). This bit of IE is only valid on an 8052.
Similarly, the priority of Timer 2 interrupt can be configured using
PT2 (IP.5). As always, be sure to also set EA (IE.7) when enabling
any interrupt.
Once Timer 2
interrupt has been enabled, a Timer 2 interrupt will be triggered
whenever TF2 (T2CON.7) or EXF2 (T2CON.6) are set. The Timer 2
Interrupt routine must be placed at 002Bh in code memory. |
